According To Its Design Specification, The Timer Circuit Delaying

According to its design specification, the timer circuit delaying the closing of an elevator door is to have a capacitance of 29. 0 µF between two points A and B. When one circuit is being constructed, the inexpensive but durable capacitor installed between these two points is found to have capacitance 31. 2 µF. To meet the specification, one additional capacitor can be placed between the two points. (a) Should it be in series or in parallel with the 31. 2 µF capacitor?in seriesin parallel(b) What should be its capacitance?µF(c) The next circuit comes down the assembly line with capacitance 28. 1 µF between A and B. To meet the specification, what additional capacitor should be installed in series or in parallel in that circuit?magnitude µF

Originally posted 2018-07-06 17:53:17. Republished by Blog Post Promoter

According to its design specification, the timer circuit delaying

Question
According to its design specification, the timer circuit delaying the closing of an elevator door is to have a capacitance of 29.0 µF between two points A and B. When one circuit is being constructed, the inexpensive but durable capacitor installed between these two points is found to have capacitance 31.2 µF. To meet the specification, one additional capacitor can be placed between the two points.
(a) Should it be in series or in parallel with the 31.2 µF capacitor?
in series
in parallel

(b) What should be its capacitance?
µF

(c) The next circuit comes down the assembly line with capacitance 28.1 µF between A and B. To meet the specification, what additional capacitor should be installed in series or in parallel in that circuit?
magnitude µF